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Table 14.3 gives a summary of the Cortex-A15 Advanced SIMD and VFP system registers.
Table 14.3. Advanced SIMD and VFP system registers
| Name | Type | Reset | Description |
|---|---|---|---|
| FPSID | RO | 0x410430F0 | See Floating-Point System ID Register |
| FPSCR | RW | 0x00000000 | See Floating-Point Status and Control Register |
| MVFR1 | RO | 0x11111111 | See Media and VFP Feature Register 1 |
| MVFR0 | RO | 0x10110222 | See Media and VFP Feature Register 0 |
| FPEXC | RW | 0x00000000 | See Floating-Point Exception Register |
The Floating-Point Instruction Registers, FPINST and FPINST2 are not implemented, and any attempt to access them is Unpredictable.
See the ARM Architecture Reference Manual for information on permitted accesses to the Advanced SIMD and VFP system registers.