4.3.62. Configuration Base Address Register

The CBAR characteristics are:


Holds the physical base address of the memory-mapped Interrupt Controller registers.

Usage constraints

The CBAR is:

  • a read-only register

  • Common to the Secure and Non-secure states

  • only accessible from PL1 or higher.


Available in all configurations.


See the register summary in Table 4.14.

Figure 4.61 shows the CBAR bit assignments.

Figure 4.61. CBAR bit assignments

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Table 4.76 shows the CBAR bit assignments.

Table 4.76. CBAR bit assignments


The primary input PERIPHBASE[31:15] determines the reset value.


Reserved, UNK/SBZP.


The primary input PERIPHBASE[39:32] determines the reset value.

To access the CBAR, read the CP15 register with:

MRC p15, 4, <Rt>, c15, c0, 0; Read Configuration Base Address Register
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