Cortex-A15 Technical Reference ManualRevision: r2p1
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10.6. External debug interface

The system can access memory-mapped debug registers through the APB interface. The APB interface is compliant with the AMBA 3 APB interface.

Figure 10.24 shows the debug interface implemented in the Cortex-A15 processor. For more information on these signals, see the ARM Architecture Reference Manual.

Figure 10.24. External debug interface, including APBv3 slave port

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This section describes external debug interface in:

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