10.2.3. Effects of resets on debug registers

The processor has the following reset signals that affect the debug registers:

nCPUPORESET

This signal initializes the processor logic, including the debug, Program Trace Macrocell (PTM), breakpoint, watchpoint logic, and performance monitors logic.

nDBGRESET

This signal resets the debug and PTM logic in the processor CLK domain, including the breakpoint and watchpoint logic. Performance monitors logic is not affected.

nPRESETDBG

This signal initializes the shared debug APB, Cross Trigger Interface (CTI), and Cross Trigger Matrix (CTM) logic.

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