5.7.2. Synchronous and asynchronous aborts

To determine a fault type, read the DFSR for a data abort or the IFSR for an instruction abort.

The processor supports an Auxiliary Data Fault Status Register for software compatibility. This register provides additional information about the faults generated on data accesses because of an uncorrected ECC errors. See Auxiliary Data Fault Status Register for more information. The processor defines an Auxiliary Instruction Fault Status register, but this register is not updated.

Copyright © 2011 ARM. All rights reserved.ARM DDI 0438D
Non-ConfidentialID122011