12.7.5. TraceEnable Control Register 1

The ETMECR1 characteristics are:

  • enables the start/stop logic

  • specifies the address range comparators used for include or exclude control

  • defines whether the specified address range comparators are used for include or exclude control.

Usage constraints

There are no usage constraints.


Available in all PTM configurations.


See the register summary in Table 12.4.

Figure 12.6 shows the ETMECR1 bit assignments.

Figure 12.6. ETMECR1 bit assignments

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Table 12.9 shows the ETMECR1 bit assignments.

Table 12.9. ETMECR1 bit assignments

[25]Trace control enable

Trace start/stop control enable. The possible values of this bit are:


Tracing is unaffected by the trace start/stop logic.


Tracing is controlled by the trace on and off addresses configured for the trace start/stop logic.

The trace start/stop event resource is not affected by the value of this bit. See

[24]Exclude/include flag

Exclude/include flag. The possible values of this bit are:


Include. The specified address range comparators indicate the regions where tracing can occur. No tracing occurs outside this region.


Exclude. The specified address range comparators indicate regions to be excluded from the trace. When outside an exclude region, tracing can occur.



[3:0]Address comparators

When this bit is set to 1, it selects an address range comparator, from 4 to 1, for exclude/include control. For example, bit [0] set to 1 selects address range comparator 1.

Tracing all instructions

To trace all processor execution:

  • set bit [24], the exclude/include flag, in the ETMECR1 to 1

  • set all other bits in the ETMECR1 to 0

  • set the ETMTEEVER to 0x0000006F (TRUE).

This has the effect of excluding nothing, that is, tracing everything, and setting the trace enable event to always true, with the start/stop logic ignored.

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