4.1.1. Registers affected by CP15SDISABLE

The processor pin CP15SDISABLE disables write access to certain registers in the CP15 system control coprocessor. See Security Extensions configuration write access disable for more information.

The Cortex-A15 processor does not have any implementation-defined registers that are affected by CP15SDISABLE.

For a list of registers affected by CP15SDISABLE, see the ARM Architecture Reference Manual.

Copyright © 2011 ARM. All rights reserved.ARM DDI 0438D