2.4.2. Power domains

The processor can support multiple power domains. Each processor supports the following power domains:

For the remaining logic, the following power domains are supported:


The design does not support a separate power domain for the L1 cache and branch prediction RAMs within the processor. It does not support L1 cache retention when the processor is powered down.

Figure 2.14 shows the supported power domains and placeholders where you can insert clamps in the Cortex-A15 processor for a single processor in the MPCore device.

Figure 2.14. Power domains

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