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Home > System Control > Register descriptions > Instruction Set Attribute Register 2 |
The ID_ISAR2 characteristics are:
Provides information about the instruction set that the processor supports.
The ID_ISAR2 is:
A read-only register.
Common to the Secure and Non-secure states.
Only accessible from PL1 or higher.
Available in all configurations.
See the register summary in Table 4.2.
Figure 4.15 shows the ID_ISAR2 bit assignments.
Table 4.43 shows the ID_ISAR2 bit assignments.
Table 4.43. ID_ISAR2 bit assignments
Bits | Name | Function |
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[31:28] | Reversal_instrs | Indicates the supported Reversal instructions:
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[27:24] | PSR_instrs | Indicates the supported A profile instructions to manipulate the PSR:
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[23:20] | MultU_instrs | Indicates the supported advanced unsigned Multiply instructions:
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[19:16] | MultS_instrs | Indicates the supported advanced signed Multiply instructions.
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[15:12] | Mult_instrs | Indicates the supported additional Multiply instructions:
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[11:8] | MultiAccessInt_instrs | Indicates support for interruptible multi-access instructions:
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[7:4] | MemHint_instrs | Indicates the supported Memory Hint instructions:
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[3:0] | LoadStore_instrs | Indicates the supported additional load/store instructions:
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To access the ID_ISAR2, read the CP15 register with:
MRC p15, 0, <Rt>, c0, c2, 2 ; Read Instruction Set Attribute Register 2