12.2. PTM options

Table 12.1 shows the options implemented in the Cortex-A15 PTM.

Table 12.1. Cortex-A15 MPCore PTM implementation options

ResourceImplemented, or number of instances
Number of address comparators pairs4
Context ID comparators1
VMID comparator1
Embedded ICE watchpoint inputs0
Counters2
Sequencers1
External inputs4
External outputs2
Extended external inputs, PMUEVENT88
Extended external input selectors2
Instrumentation resources0
FIFOFULL supportedNo
Software access to registersYes
FIFO depth84 bytes
Trace outputSynchronous ATB interface
Timestamp size64 bits
Timestamp encodingNatural binary

Copyright © 2011-2012 ARM. All rights reserved.ARM DDI 0438G
Non-ConfidentialID080412