12.7.10. Auxiliary Control Register

The ETMAUXCR characteristics are:

Purpose

Provides additional PTM controls.

Usage constraints

There are no usage constraints.

Configurations

Available in all PTM configurations.

Attributes

See the register summary in Table 12.4.

Figure 12.10 shows the ETMAUXCR bit assignments.

Figure 12.10. ETMAUXCR bit assignments

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Table 12.13 shows the ETMAUXCR bit assignments.

Table 12.13. ETMAUXCR bit assignments

BitsNameFunction
[31:6]-

Reserved.

[5]Force timestamp packet insertion

Force insertion of timestamp packets, regardless of current trace activity:

0

Timestamp packets delayed when trace activity is high. This is the reset value.

1

Timestamp packets inserted regardless of trace activity.

This bit might be set if timestamp packets occur too far apart. Setting this bit might cause the trace FIFO to overflow more frequently when trace activity is high.

[4]Delay synchronization packet insertion

Delays insertion of synchronization packets:

0

Synchronization packets inserted normally regardless of trace activity. This is the reset value.

1

Synchronization packets delayed when trace activity is high.

This bit might be set if synchronization packets occur too close. Setting this bit might cause the trace FIFO to overflow less frequently when trace activity is high.

[3]Disable waypoint update packet

Specifies whether the PTM issues waypoint update packets if there are more than 4096 bytes between waypoints:

0

PTM always issues update packets if there are more than 4096 bytes between waypoints. This is the reset value.

1

PTM does not issue waypoint update packets unless required to do so as the result of an exception or debug entry.

[2]Disable timestamps on exception entry or return

Specifies whether the PTM issues a timestamp on an exception entry or return:

0

PTM issues timestamps on exception entry or return. This is the reset value.

1

PTM does not issue timestamps on exception entry or return.

[1]Disable timestamps on barriers

Specifies whether the PTM issues a timestamp on a barrier instruction:

0

PTM issues timestamps on barrier instructions. This is the reset value.

1

PTM does not issue timestamps on barriers.

[0]Disable forced overflow

Specifies whether the PTM enters overflow state when synchronization is requested, and the previous synchronization sequence has not yet completed. This does not affect entry to overflow state when the FIFO becomes full:

0

Forced overflow enabled. This is the reset value.

1

Forced overflow disabled.


When setting any of bits[3:0] of this register the PTM behavior might contradict the CoreSight Program Flow Trace Architecture Specification. Tools must be aware of the implications of setting any of these bits:

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