12.7.3. System Configuration Register

The ETMSCR characteristics are:

Purpose

Shows the PTM features supported by the PTM macrocell. The contents of this register are based on inputs provided by the ASIC.

Usage constraints

There are no usage constraints.

Configurations

Available in all PTM configurations.

Attributes

See the register summary in Table 12.4.

Figure 12.4 shows the ETMSCR bit assignments.

Figure 12.4. ETMSCR bit assignments

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Table 12.7 shows the ETMSCR bit assignments.

Table 12.7. ETMSCR bit assignments

BitsNameFunction
[31:15]-

SBZP.

[14:12]Number of processors supported by PTM

Indicates the number of processor supported minus one. For the Cortex-A15 MPCore processor, this value is 0.

[11:9]-

SBZP.

[8]FIFOFULL supported

Indicates that FIFOFULL is not supported. For the Cortex-A15 MPCore processor, this value is 0.

[7:0]-

SBZP.


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