3.3.9. STM Features 3 Register

The STMSPFEAT3R Register characteristics are:

Purpose

Indicates the features of the STM.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes
Offset

0xEA8

Type

RO

Reset

0x0000007F

Width

32

Figure 3.9 shows the STMSPFEAT3R Register bit assignments.

Figure 3.9. STMSPFEAT3R Register bit assignments

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Table 3.10 shows the STMSPFEAT3R Register bit assignments.

Table 3.10. STMSPFEAT3R Register bit assignments

BitsNameFunction
[31:7]Reserved

Reserved.

[6:0]NUMMAST

The number of stimulus ports masters implemented, minus 1.

b1111111 = 128 masters are implemented.


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