3.3.14. Integration Mode ATB Control 0 Register

The STMITATBCTR0 Register characteristics are:

Purpose

Controls the value of the ATVALIDM, AFREADYM, and ATBYTESM outputs in integration mode.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes
Offset

0xEF8

Type

WO

Reset

-

Width

32

Figure 3.14 shows the STMITATBCTR0 Register bit assignments.

Figure 3.14. STMITATBCTR0 Register bit assignments

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Table 3.15 shows the STMITATBCTR0 Register bit assignments.

Table 3.15. STMITATBCTR0 Register bit assignments

BitsNameFunction
[31:10]Reserved

Reserved.

[9:8]ATBYTESM_W

Sets the value of the ATBYTESM output:

b11 = Drive logic b11 on the ATBYTESM output.

b10 = Drive logic b10 on the ATBYTESM output.

b01 = Drive logic b01 on the ATBYTESM output.

b00 = Drive logic b00 on ATBYTESM output.

[7:2]Reserved

Reserved.

[1]AFREADYM_W

Sets the value of the AFREADYM output:

b1 = Drive logic 1 on the AFREADYM output.

b0 = Drive logic 0 on the AFREADYM output.

[0]ATVALIDM_W

Sets the value of the ATVALIDM output:

b1 = Drive logic 1 on the ATVALIDM output.

b0 = Drive logic 0 on the ATVALIDM output.


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