3.3.22. Peripheral ID1 Register

The STMPIDR1 Register characteristics are:

Purpose

Part of the set of Peripheral Identification registers. Contains part of the designer specific part number and part of the designer identity.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes
Offset

0xFE4

Type

RO

Reset

0x000000B9

Width

32

Figure 3.22 shows the STMPIDR1 Register bit assignments.

Figure 3.22. STMPIDR1 Register bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 3.23 shows the STMPIDR1 Register bit assignments.

Table 3.23. STMPIDR1 Register bit assignments

BitsNameFunction
[31:8]Reserved

Reserved.

[7:4]JEP106_bits3to0

Bits [3:0] of the JEDEC identity code indicating the designer of the component, together with the continuation code.

b1011 = Lowest 4 bits of the JEP106 Identity Code.

[3:0]Part_Number_bits11to8

Bits [11:8] of the component part number. This is selected by the designer of the component.

b1001 = Upper 4 bits of the Part Number, 0x962.


Copyright © 2010 ARM. All rights reserved.ARM DDI 0444A
Non-ConfidentialID090310