3.3.23. Peripheral ID2 Register

The STMPIDR2 Register characteristics are:

Purpose

Part of the set of Peripheral Identification registers. Contains part of the designer identity and the product revision.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes
Offset

0xFE8

Type

RO

Reset

0x0000000B

Width

32

Figure 3.23 shows the STMPIDR2 Register bit assignments.

Figure 3.23. STMPIDR2 Register bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 3.24 shows the STMPIDR2 Register bit assignments.

Table 3.24. STMPIDR2 Register bit assignments

BitsNameFunction
[31:8]Reserved

Reserved.

[7:4]Revision

The Revision field is an incremental value starting at 0x0 for the first design of this component. This only increases by 1 for both major and minor revisions and is used as a look-up to establish the exact major and minor revision.

b0000 = This device is at r0p0.

[3]JEDEC

Always set. Indicates that a JEDEC assigned value is used.

b1 = The designer ID is specified by JEDEC (http://www.jedec.org).

[2:0]JEP106_bits6to4

Bits [6:4] of the JEDEC identity code indicating the designer of the component, together with the continuation code.

b011 = Upper 3 bits of the JEP106 Identity Code.


Copyright © 2010 ARM. All rights reserved.ARM DDI 0444A
Non-ConfidentialID090310