2.2.2. QoS regulators

The CoreLink QoS-301 Network Interconnect Advanced Quality of Service provides facilities to regulate transactions based on the following inter-related measures:


Issuing rate.




Number of outstanding transactions.

Assuming that the master is always trying to issue transaction requests, then RT, LT, and NT are related by the following formula:

RT = NT x 1/LT

The formula is a variation on Little’s Law, that relates queue length to arrival rate, and time in the system. A 3-dimensional surface plotted in a graph represents this relationship. See Figure 2.2.

QoS-301 supports three regulation mechanisms based on the above three measures. All three regulate the aggregate of the traffic through the ASIB or IB regardless of the eventual destination. This works best when the majority of the traffic is to a single shared resource, such as a dynamic memory controller.


A shared resource, such as a dynamic memory controller, is often the most widely shared and heavily loaded resource in a system.

The regulators of transaction rate, and the number of outstanding transactions set an upper bound on these measures. They prevent the measures from exceeding a limit that you program. They do this by holding back transaction requests whenever the limits are reached.

The latency regulator adds a QoS value to the request, and the interconnect uses that value as an arbitration priority. You can also configure the interconnect to forward this QoS value to a QoS value-sensitive slave. This slave can then prioritize the request based on its QoS value. The latency regulator increases the QoS value when it observes an increase in latency.

Figure 2.2. Relationship between transaction rate, latency, and outstanding transactions

Relationship between transaction rate, latency, and outstanding transactions

The CoreLink QoS-301 Network Interconnect Advanced Quality of Service regulators provide mechanisms that control how the NIC-301 shares the resources of a slave. You can use them either individually, or in combination, to control this sharing, and to prevent overloading the slave.

One measure of resource loading is the number of requests in the queue waiting to be served. When most of the requests from a number of masters all go to the same slave, the sum of the number of outstanding transactions at each master corresponds to the number of requests waiting to be served at that slave.

Regulating the number of outstanding transactions from each of the masters therefore provides a direct means to distribute the resources of a slave without overloading it. If the loading changes for any reason, for example when a master completes its task early, then:

Figure 2.2 shows that for a constant number of outstanding transactions, a decrease in latency corresponds to an increase in transaction issuing rate. In effect, some of the spare capacity has been shared out amongst the other masters.

Another measure of the resource that a slave provides is the rate at which it processes transactions. The transaction rate regulator enables you to limit the rate at which a master issues transactions, and therefore sets the proportion of the resource of the slave that is requested. Figure 2.2 shows that for a constant issuing rate, a master can compensate for any increase in latency by increasing the number of outstanding transactions.

The third measure of latency is not under the direct control of a master because it depends on many factors in the interconnect and the slave. The more heavily loaded a slave is, the longer a transaction must wait for service, and the higher the latency. You can regulate the latency by adding a QoS value to transaction requests to indicate to the system and slave when a master requires the latency to be reduced. The higher the value, the lower the latency required.

All three regulators can be active at the same time. For example, if the rate regulator is limiting a master to a particular rate, and the latency increases, then the number of outstanding transactions tends to increase to compensate. If this were permitted to continue unchecked, then the master would take more than its share of the resource from the slave. You can program the outstanding transaction regulator to prevent this. At the same time, the latency regulator increases the priority to decrease the latency, enabling the rate to recover, and the number of outstanding transactions to decrease.

A control register permits you to enable or disable any combination of the three regulators in one programming step. See Chapter 3 Programmers Model.

You can also configure internal IBs to contain QoS regulators that provide intermediate regulation points between switches in an interconnect. This could, for example, enable a composite flow of requests from many sources to be constrained without having to over-constrain the individual flows.

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