A.11.1. Error detection global notification signals

Table A.34 shows the error detection global notification signals.

Table A.34. Error detection global notification signals

RAMERROutputProcessor 0 and processor 1 RAM arrays and SCU RAMsAny ECC error on any RAM
FATALRAMERR[N:0]OutputFatal ECC error on any RAM
ITCMECCENInputDefines reset value of ACTLR bit[10] for each processor
CORRBUSERROutputSCUCorrectable ECC error on any bus
FATALBUSERROutputFatal ECC error on any bus

Copyright © 2012, 2014 ARM. All rights reserved.ARM DDI 0458C