A.9. Performance monitoring signals

Table A.32 shows the performance monitoring signals.

Table A.32. Performance monitoring signals

NameTypeSource/destinationDescription
PMUEVENT0[55:0]OutputPerformance Monitoring Unit (PMU) or External Performance Monitoring UnitPMU event bus for processor 0.
PMUEVENT1[55:0]OutputPMU event bus for processor 1.
PMUIRQ[N:0]OutputSystem Integrity Controller or External Performance Monitoring unitProcessor 0 and processor 1 interrupt requests by system metrics.
PMUPRIV[N:0]OutputExternal Performance Monitoring Unit

Gives the status of the Cortex-R7 MPCore processor:

0

In user mode.

1

In privileged mode.

Note

This signal does not provide input to the CoreSight trace delivery infrastructure.


See Performance Monitoring Unit.

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