10.4. Embedded Trace Macrocell

The optional ETM is compliant with the ETMv4 architecture. It provides full address and data trace, and enables real-time code tracing of the processor in an embedded system.

There is one ETM per processor, set up as a build option. In a twin-processor configuration, the processors can share a single ETM.

The ETM is enabled through the APB debug interface. You can disable the ETM, and power it off for power saving.

See the ARM® CoreSight™ ETM-R7 Technical Reference Manual for more information.

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