A.11.2. RAM ECC error bank status signals

Table A.35 shows the RAM ECC error bank status signals.

Table A.35. RAM ECC error bank status signals

NameTypeSource/destinationDescription
DCEBEMPTY[N:0]OutputSpecific RAM groupECC error bank empty for data cache
ICEBEMPTY[N:0]OutputECC error bank empty for instruction cache
DTCMEBEMPTY0OutputECC error bank empty for data TCM for processor 0
DTCMEBEMPTY1OutputECC error bank empty for data TCM for processor 1
ITCMEBEMPTY0OutputECC error bank empty for instruction TCM for processor 0
ITCMEBEMPTY1OutputECC error bank empty for instruction TCM for processor 1
SCUEBEMPTYOutputECC error bank empty for SCU

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