ARM Cortex-R7 MPCore Technical Reference ManualRevision: r0p1
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9.3.6. Master Filtering End Address Register

The Master Filtering End Address Register characteristics are:

Purpose

Provides the end address for use with master port 1 in a two-master port configuration.

Usage constraints

This register has an inclusive address as its end address. This means that the topmost megabyte of address space of memory can be included in the filtering address range.

Configurations

Available in all two-master port configurations. When only one master port is present writes have no effect and reads return a value 0x0 for all filtering registers.

Attributes

See the register summary in Table 9.2.

Figure 9.7 shows the Master Filtering End Address Register bit assignments.

Figure 9.7. Master Filtering End Address Register bit assignments

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Table 9.8 shows the Master Filtering End Address Register bit assignments.

Table 9.8. Master Filtering End Address Register bit assignments

Bits Name Description
[31:20]Filtering end address

End address for use with master port 1 in a two-master port configuration, when address filtering is enabled.

The default value is the value of MFILTEREND sampled on exit from reset. The value on the input gives the upper address bits with 1MB granularity.

[19:0]ReservedSBZ

See Configuration signals. See also AXI master port 1

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