A.10. Exception flag signals

Table A.33 shows the exception flag signals.

Table A.33. Exception flag signals

NameTypeSource/destinationDescription
SCUEVABORTOutputSystem integrity controller

Indicates that an external abort has occurred during a coherency writeback. It is a pulse signal that is asserted for one CLK clock cycle.

FPUFLAGS0[5:0]Output

Floating-Point Unit output flags for processor 0. Only implemented if processor 0 includes an FPU:

Bit[5] gives the value of FPSCR[7].

Bits[4:0] give the value of FPSCR[4:0].

FPUFLAGS1[5:0]Output

Floating-Point Unit output flags for processor 1. Only implemented if processor 1 is present and if processor 1 includes an FPU:

Bit[5] gives the value of FPSCR[7].

Bits[4:0] give the value of FPSCR[4:0].


See Chapter 5 Floating Point Unit Programmers Model.

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