4.2.4. c6 registers

Table 4.5 shows the 32-bit wide CP15 system control registers when CRn is c6.

Table 4.5. c6 register summary

Op1CRmOp2NameReset Description
0c00

DFAR

-

Data Fault Address Register, see the ARM® Architecture Reference Manual ARMv7-A and ARMv7-R edition

2IFAR-Instruction Fault Address Register, see the ARM® Architecture Reference Manual ARMv7-A and ARMv7-R edition
c10DRBARUNKMPU Region Base Address Registers
2DRSR0x00000000MPU Region Size and Enable Registers
4DRACRUNKMPU Region Access Control Registers
c20RGNRUNKMPU Memory Region Number Registers

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