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Table 7.1 shows that three different ECC codes are required:
A 34-bit ECC with seven check bits for the tag RAM of the data side.
A 32-bit ECC with seven check bits for the data RAM of the data side, the tag RAM of the instruction side, and the tag RAMs of the SCU.
A 64-bit ECC with eight check bits for the instruction data RAM.
The 32-bit ECC check matrix can be a subset of the 34-bit ECC check matrix, so that only two different ECC codes are required, a 34-bit ECC and a 64-bit ECC.
| Copyright © 2012, 2014 ARM. All rights reserved. | ARM DDI 0458C |
| Non-Confidential | ID112814 |
| PDF version | |
| Home > Fault Detection > RAM protection > ECC codes |