9.3. SCU registers

All SCU registers are memory-mapped and have a common base address. Addresses are relative to the base address of the region for the SCU memory map, PERIPHBASE[31:13]. To access the SCU registers, PERIPHBASE[31:13] must be located in the address range that PFILTERSTART[31:20] and PFILTEREND[31:20] define. The value of PERIPHBASE[31:13] can be retrieved by a processor using the Configuration Base Address Register (CBAR) so that software can determine the location of the SCU registers.

The Peripheral End Address filtering must be greater than or equal to the Peripheral Start Address. See Peripherals Filtering Start Address Register and Peripherals Filtering End Address Register for information about these filtering addresses. The memory space in MB used for the address filtering is defined as follows:

Memory_space (MB) = End - Start + 1.

Table 9.1 shows the peripheral accesses relative to the Peripheral Address setting.

Table 9.1. Peripheral accesses

AccessSCU registersPeripheral port traffic
Accessible by any processorAccessible through the ACPAccessible by any processor or through the ACP
Peripheral End Address less than Peripheral Start AddressNoNoNot enabled
Peripheral End Address equal to Peripheral Start AddressYesNoEnabled
Peripheral End Address greater than Peripheral Start AddressYesNoEnabled

Table 9.2 shows the SCU registers. All SCU registers are byte accessible and are reset by nSCURESET.

Table 9.2. SCU registers summary

Offset from PERIPHBASE[31:13]

NameReset valuePage
0x00SCU Control Register

Implementation defined

SCU Control Register
0x04SCU Configuration Register

Implementation defined

SCU Configuration Register
0x08SCU CPU Power Status Register-SCU CPU Power Status Register
0x0CSCU Invalidate All Registers 0x0SCU Invalidate All Register
0x40Master Filtering Start Address Register

Defined by MFILTERSTART input

Master Filtering Start Address Register
0x44Master Filtering End Address Register

Defined by MFILTEREND input

Master Filtering End Address Register
0x48Peripherals Filtering Start Address Register

Defined by PFILTERSTART input

Peripherals Filtering Start Address Register
0x4CPeripherals Filtering End Address Register

Defined by PFILTEREND input

Peripherals Filtering End Address Register
0x50SCU Access Control Register0b11SCU Access Control Register
0x60SCU Error Bank First Entry Register[a]-SCU Error Bank First Entry Register
0x64SCU Error Bank Second Entry Register[a]-SCU Error Bank Second Entry Register
0x70SCU Debug Tag RAM Operation Register-SCU Debug Tag RAM Operation Register
0x74SCU Debug Tag RAM Data Value Register-SCU Debug Tag RAM Data Value Register
0x78SCU Debug Tag RAM ECC Chunk Register[a]-SCU Debug Tag RAM ECC Chunk Register

[a] This register is present only when ECC is implemented.


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