4.3.1. Main ID Register

The MIDR characteristics are:

Purpose

Provides identification information for the Cortex-R7 MPCore processor, including an implementer code for the device and a device ID number.

Usage constraints

The MIDR is:

  • Only accessible in privileged mode.

  • A read-only register.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 4.2.

Figure 4.1shows the MIDR bit assignments.

Figure 4.1. MIDR bit assignments

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Table 4.18 shows the MIDR bit assignments.

Table 4.18. MIDR bit assignments

BitsNameFunction
[31:24]Implementer

Indicates the implementer code.

[23:20]Variant

Indicates the variant number of the processor. This is the major revision number n of the rnpn revision status.

[19:16]Architecture

Indicates the architecture code.

[15:4]Primary part number

Indicates the primary part number.

[3:0]Revision

Indicates the revision number of the processor. This is the minor revision number n of the rnpn revision status.


To access the MIDR, read the CP15 register with:

MRC p15, 0, <Rd>, c0, c0, 0; Read Main ID Register
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