4.3.2. MPU Type Register

The MPUIR characteristics are:

Purpose

Indicates:

  • The number of MPU regions, 12 or 16.

  • The type of MPU regions, unified or separate.

Usage constraints

The MPUIR is:

  • Only accessible in privileged mode.

  • A read-only register.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 4.2.

Figure 4.2 shows the MPUIR bit assignments.

Figure 4.2. MPUIR bit assignments

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Figure 4.2Figure 4.2Figure 4.2Table 4.19 shows the MPUIR bit assignments.

Table 4.19. MPUIR bit assignments

BitsNameFunction
[31:16]ReservedSBZ
[15:8]Number of MPU regions

Indicates the number of regions:

00b00010000

16 regions.

00b00001100

12 regions.

[7:1]ReservedSBZ
[0]MPU region type

Specifies the type of MPU regions, unified or separate, in the processor.

Always set to 0 because the Cortex-R7 MPCore processor has unified memory regions. See Addresses in the Cortex-R7 MPCore processor.


To access the MPUIR, read the CP15 register with:

MRC p15,0,<Rt>,c0,c0,4 ; Read CP15 MPU Type Register
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