11.6. Accelerator Coherency Port interface

The optional Accelerator Coherency Port (ACP) provides memory coherency between each processor in the Cortex-R7 MPCore processor design and an external master.

The ACP is 64 bits wide, and conforms to the AMBA 3 AXI standard as described in the AMBA AXI Protocol Specification.

The following sections describe the ACP:

Copyright © 2012, 2014 ARM. All rights reserved.ARM DDI 0458C