5.4. Register summary

Table 5.2 shows the FPU system registers. All FPU system registers are 32-bit wide. Reserved register addresses are RAZ/WI.

Table 5.2. FPU system registers

NameTypeResetDescription
FPSID RO 0x41023170See Floating-Point System ID Register
FPSCRRW0x00000000See Floating-Point Status and Control Register
MVFR1RO 0x01000011See the ARM® Architecture Reference Manual ARMv7-A and ARMv7-R edition
MVFR0RO

0x10110221[a]

0x10110021[b]

See the ARM® Architecture Reference Manual ARMv7-A and ARMv7-R edition
FPEXCRW 0x00000000See Floating-Point Exception Register

[a] For full FPU implementation, with double precision.

[b] For single-precision FPU implementation.


Copyright © 2012, 2014 ARM. All rights reserved.ARM DDI 0458C
Non-ConfidentialID112814