7.1.1. RAM and logic protection
The processor protects memories and logic in two different
ways. These are independent, and can be used separately.
The RAMs are protected with ECC, except
the branch prediction RAMs, that only have parity protection.
The logic of the individual processors is protected
by duplication with diagnostic compare. This is known as redundant
logic in a lock-step or split/lock implementation. The SCU logic
is also duplicated. The AXI buses can also be protected with ECC
and parity.
These are independent, and can be used separately.
The processor uses Single Error Correction and Double
Error Detection (SEC-DED) ECCs to detect and correct
errors in the RAMs and on the AXI buses. A finite number of hard,
that is, permanent errors can be detected and corrected with continued
operation using dedicated error registers.
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