9.7.1. Peripheral interface configuration

The peripheral interfaces are configured during implementation and integration.

You can configure the AHB peripheral port to be removed, and not included in the processor design. The AXI peripheral port is always included and is not optional.

During implementation, you can configure the peripheral ports to use an error-correction scheme to detect and correct signals transferred using the peripheral port buses, see Bus ECC.

The size of each peripheral interface is configured during integration. The permissible LLPP Normal AXI, LLPP Virtual AXI, or AHB peripheral interface sizes are:

The LLPP Virtual AXI is either the same size as the LLPP Normal AXI or a sub-region of it.

The size of the peripheral interfaces is visible to software in the Peripheral Port Region Registers.

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