7.1.5. Peripheral port regions

Any memory address accessed using one of the peripheral port interfaces is considered to be non-cacheable and eXecute-Never (XN), regardless of the attributes of any MPU region that the address also belongs to. The memory type and other access permissions for such a region are inherited from the MPU region that the address also belongs to. See Peripheral interface attributes and permissions.

Copyright © 2010-2011 ARM. All rights reserved.ARM DDI 0460C
Non-ConfidentialID021511