13.3.3. DBGITETMIF Register (ETM interface)

The DBGITETMIF Register at offset 0xED8 is write-only. Figure 13.1 shows the register bit assignments.

Figure 13.1. DBGITETMIF Register bit assignments

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Table 13.4 shows the fields when writing the DBGITETMIF Register. When this register is written the appropriate output pins take the value written.

Table 13.4. DBGITETMIF Register bit assignments

BitsNameFunction
[31:14]-Reserved. Write as zero.
[13]EVNTBUSm[54]Set value of the EVNTBUSm[54] output pin.
[12]EVNTBUSm[0]Set value of the EVNTBUSm[0] output pin.
[11]ETMCIDm[31]Set value of the ETMCIDm[31] output pin.
[10]ETMCIDm[0]Set value of the ETMCIDm[0] output pin.
[9]ETMDDm[63]Set value of the ETMDDm[63] output pin.
[8]ETMDDm[0]Set value of the ETMDDm[0] output pin.
[7]ETMDAm[31]Set value of the ETMDAm[31] output pin.
[6]ETMDAm[0]Set value of the ETMDAm[0] output pin.
[5]ETMDCTLm[11]Set value of the ETMDCTLm[11] output pin.
[4]ETMDCTLm[0]Set value of the ETMDCTLm[0] output pin.
[3]ETMIAm[31]Set value of the ETMIAm[31] output pin.
[2]ETMIAm[1]Set value of the ETMIAm[1] output pin.
[1]ETMICTLm[13]Set value of the ETMICTLm[13] output pin.
[0]ETMICTLm[0]Set value of the ETMICTLm[0] output pin.

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