6.3.5. c9, Software Increment Register

The PMSWINC Register characteristics are:


Increments the count of an Event Count Register.

Usage constraints

The PMSWINC Register is:

  • A write-only register that Reads-As-Zero

  • Accessible in:

  • You must only use the PMSWINC Register to increment Event Count Registers when the counter event is set to 0x00, software count, in the Event Select Register, see c9, Event Type Selection Register.

    If you attempt to use the PMSWINC Register to increment an Event Count Register when the counter event is set to a value other than 0x00 the result is Unpredictable.


Available in all processor configurations.


Figure 6.5 shows the bit assignments.

Figure 6.5. PMSWINC Register bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Table 6.6 shows the bit assignments.

Table 6.6. PMSWINC Register bit assignments




RAZ on reads, SBZP on writes



Increment Counter 2



Increment Counter 1



Increment Counter 0

To access the PMSWINC Register, write CP15 with:

MCR p15, 0, <Rd>, c9, c12, 4 ; Write PMSWINC Register
Copyright © 2010-2011 ARM. All rights reserved.ARM DDI 0460C