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This section describes the differences in functionality between product revisions:
First release.
Functional changes are:
Adds option for single-precision only floating point support, in addition to existing double-and-single-precision support.
Configurable options. See Table 1.1.
FLOAT_PRECISION bit in Build Options 1 register. See c15, Build Options 1 Register.
VFP instructions undefined in single-precision. See VFP instructions in a single-precision configuration.
Change to MVFR0 register to indicate double and single-precision support. See Table 11.7.
Changes the behavior of the AXI slave port for instruction and data cache accesses. See Cache RAM access.
Adds the V7A&R MP extensions. See:
SCTLR enables SWP and SWPB to be Undefined. See Table 4.24.
Adds support for the ARM UDIV and SDIV instructions. See Instruction Set Attributes Registers
Adds ID values for r1p0. See Table 1-3 on page 1-15.
Functional changes are:
Adds ID values for r1p1. See Table 1-3 on page 1-15.
| Copyright © 2010-2011 ARM. All rights reserved. | ARM DDI 0460C |
| Non-Confidential | ID021511 |
| PDF version | |
| Home > Introduction > Changes from previous version |