11.1.3. VFP instructions in a single-precision configuration

Table 11.1 lists the VFP instructions that are Undefined in a single-precision only configuration. These instructions are <opcode>.<cond>.F64 where opcode is listed in the table:

Table 11.1. Instructions undefined in a single-precision only configuration

Instruction Operation Opcodes
Vector Multiply Accumulate or Subtract VMLA, VMLS
Vector Negate Multiply Accumulate or Subtract VNMLA, VNMLS, VNMUL
Vector Multiply VMUL
Vector Add VADD
Vector Subtract VSUB
Vector Divide VDIV
Vector Move VMOV (immediate), VMOV (register)
Vector Absolute VABS
Vector Negate VNEG
Vector Square Root VSQRT
Vector Compare VCMP, VCMPE
Vector Convert VCVT, VCVTR (all supported variants)

Note

The single-precision variants of these instructions (<opcode>.<cond>.F32) execute as normal.

Copyright © 2010-2011 ARM. All rights reserved.ARM DDI 0460C
Non-ConfidentialID021511