9.2.6. Memory system implications for AXI accesses

The attributes of the memory being accessed can affect an AXI access. The L1 memory system can cache any Normal memory address that is marked as either:

However, Device and Strongly Ordered memory is always Non-cacheable. Also, any unaligned access to Device or Strongly Ordered memory generates an alignment fault and therefore does not cause any AXI transfer. This means that the access examples given in this chapter never show unaligned accesses to Device or Strongly Ordered memory.

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