10.2.3. Dormant mode

In Dormant mode, only the CPU logic, but not the CPU TCM and cache RAMs, is powered down, so that the only power consumption is the static leakage current of the RAMs.

Before entering Dormant mode, you must save the CPU state, except for the cache and TCM state, in memory. When power is restored to the CPU logic, the CPU is returned to Run mode by asserting and deasserting nRESETm. You must restore the CPU state as part of the boot process. Because the cache and TCM are not powered down in Dormant mode, you do not have to invalidate or initiate them during boot, and the task can access data in the cache without requiring a cache refill. In Dormant mode, the CPU state, apart from the cache and TCM state, is stored to memory before entry into this mode, and restored after exit. For more information on how to implement and use Dormant mode in your design, contact ARM.

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