11.3.3. Floating-Point Exception Register, FPEXC

The FPEXC Register characteristics are:

Purpose

Provides global enable and disable control of the VFP extension, and indicate how the state of this extension is recorded.

Usage constraints
  • The FPEXC Register is accessible in Privileged modes only.

  • Clearing EN disables VFP functionality, causing all VFP instructions apart from privileged system register accesses to generate an Undefined Instruction exception.

Configurations

Use this register if the device is configured as a Cortex-R5F processor.

Attributes

Figure 11.4 shows the bit assignments.

Figure 11.4. FPEXC Register bit assignments

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Table 11.6 shows the bit assignments.

Table 11.6. FPEXC Register bit assignments

Bits

Name

Function

[31]

-RAZ.

[30]

ENVFP enable bit. Setting EN enables VFP functionality. Reset clears EN.
[29]DEX

Set when an Undefined Instruction exception is taken because of a vector instruction that would have been executed if the processor supported vectors. This field is cleared when an Undefined Instruction exception is taken for any other reason. Resets to zero.

In single-precision only configurations, this bit is not set for any double-precision operations, whether they are vector operations or not.

[28:0]-RAZ.

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