12.3.6. Power domains

Cortex-R5 supports separate debug and core power domains to enable debug over power-down.

The following debug registers are implemented in the debug domain:

All other implemented debug registers are in the core domain.

All accesses to core domain debug registers when the CPU is in Dormant or Shutdown modes return an error response on the CPU APB interface.

For more information about these registers and the split between core domain and debug domain registers, see the ARM Architecture Reference Manual.

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