12.3.7. Effects of resets on debug registers

The processor has the following reset signals that affect the processor debug logic:

nSYSPORESET

This signal resets all processor logic including the debug logic.

DBGRESETmn

This signal resets all the core domain debug logic.

PRESETDBGmn

This signal resets all debug domain debug logic.

See Resets for more information on resets and reset requirements.

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