13.2. Summary of the processor registers used for integration testing

Table 13.1 lists the processor Integration Test Registers and the Integration Mode Control Register (DBGITCTRL).

Table 13.1. Integration Test Registers summary

Register name

Base offset

Default value

Integration Test Registers
DBGITETMIF0xED8n/a[a]WOSee DBGITETMIF Register (ETM interface)
DBGITMISCOUT0xEF8n/aWOSee DBGITMISCOUT Register (Miscellaneous Outputs)
DBGITMISCIN0xEFC-[a]ROSee DBGITMISCIN Register (Miscellaneous Inputs)
Integration Mode Control Register
DBGITCTRL0xF000R/WSee Integration Mode Control Register (DBGITCTRL)

[a] See the register description for this value.

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