11.3.4. Media and VFP Feature Registers, MVFR0 and MVFR1

The MVFR0 and MVFR1 Register characteristics are:

Purpose

Describes the features supported by the FPU.

Usage constraints

The MVFR0 and MVFR1 Registers:

  • are read-only registers

  • are accessible in Privileged modes only.

  • ARM recommends that any software attempting to determine the presence or absence of double-precision floating point hardware support uses the MVFR1 register.

Configurations

Use this register if the device is configured as a Cortex-R5F processor.

Attributes

Figure 11.5 shows the MVFR0 Register bit assignments.

Figure 11.5. MVFR0 Register bit assignments

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Table 11.7 shows the MVFR0 Register bit assignments.

Table 11.7. MVFR0 Register bit assignments

BitsNameFunction

[31:28]

RM

Rounding modes supported:

0x1 = all VFP rounding modes supported.

[27:24]

SV

VFP short vector hardware support:

0x0 = not supported.

[23:20]

SR

VFP hardware square root:

0x1 = supported.

[19:16]

D

VFP hardware divide:

0x1 = supported.

[15:12]

TE

VFP exception trapping:

0x0 = only untrapped exception handling can be selected.

[11:8]

DP

Hardware support for VFP double-precision:

0x0 = no double-precision support present in hardware

0x2 = VFPv3 double-precision HW support present.

[7:4]

SP

Hardware single-precision support:

0x2 = VFPv3 supported.

[3:0]

RB

VFP register bank 16x64-bit register bank support:

0x1 = supported


Figure 11.6 shows the MVFR1 Register bit assignments.

Figure 11.6. MVFR1 Register bit assignments

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Table 11.8 shows the MVFR1 Register bit assignments.

Table 11.8. MVFR1 Register bit assignments

BitsNameFunction

[31:28]

-

Reserved

[27:24]VFP HPFP

VFP half-precision conversions:

0x0 = no support.

[23:20]VFP A_SIMD

Advanced SIMD half-precision conversions:

0x0 = no support.

[19:16]SP

Single-precision floating-point operation support for Advanced SIMD:

0x0 = no support.

[15:12]I

Integer operation support for Advanced SIMD:

0x0 = no support.

[11:8]

LS

Load and store instruction support for Advanced SIMD:

0x0 = no support.

[7:4]

DN

Indicates whether the VFP hardware supports only Default NaN mode:

0x1 = hardware supports propagation of NaN values in addition to Default NaN mode.

[3:0]

FZ

Indicates whether the VFP hardware supports only Flush-to-Zero mode:

0x1 = hardware supports full denormal arithmetic in addition to Flush-to-Zero mode.


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