8.4.8. AXI slave interfaces for TCMs

The processor has a 64-bit AXI slave interface that provides access to the TCM interfaces from the AXI bus. This interface is included by default, but can be excluded during configuration of the processor.

You can use the slave interface for access to the TCM memories. This also enables you to construct a system with a consistent view of memory. That is, the TCMs can be available at the same address to the processor and to the system bus.

The AXI slave interface accesses have lower priority than the LSU or PFU accesses.

The MPU does not check accesses from the AXI slave. You can configure the processor to enable privileged or nonprivileged access to the TCM interfaces from the AXI slave port.

The AXI slave interface does not support locked and exclusive accesses. This means that AXI masters, other than the processor, cannot safely use semaphores in the TCMs. Although the Cortex-R5 processor can use semaphores in the TCMs for inter-process synchronization, you must not use the AXI-slave interface to write to TCM semaphores. The processor has no logic to preserve its own exclusivity against such writes.

For more information on the AXI slave interface, see AXI slave interface.

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