A.9. ETM interface signals

Table A.23 shows the ETM interface signals.

Table A.23. ETM interface signals

SignalDirectionDescription
ETMICTLm[13:0]OutputETM instruction control bus
ETMIAm[31:1]OutputETM instruction address
ETMDCTLm[11:0]OutputETM data control bus
ETMDAm[31:0]OutputETM data address
ETMDDm[63:0]OutputETM data-data
ETMCIDm[31:0]OutputCurrent value of processor CID register
ETMWFIPENDINGmOutputCore is attempting to enter standby state because of a WFI or WFE
EVNTBUSm[54:0]OutputPerformance monitor unit output
ETMPWRUPmInputPower up ETM interface
nETMWFIREADYmInputETM FIFO is empty, CPU can enter WFI state
ETMEXTOUTm[1:0]InputETM detected events

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