B.17. SVC, BKPT, Undefined, and Prefetch Aborted instructions

This section describes the cycle timing behavior for SVC, Undefined Instruction, BKPT and Prefetch Abort.

In all cases the exception is taken in the Wr stage of the pipeline. SVC and most Undefined Instructions that fail their condition codes take one cycle. A small number of Undefined Instructions that fail their condition codes take two cycles. Table B.22 shows the SVC, BKPT, Undefined, prefetch aborted instructions cycle timing behavior.

Table B.22. SVC, BKPT, Undefined, prefetch aborted instructions cycle timing behavior

InstructionCycles
SVC (formerly SWI)9
BKPT9
Prefetch Abort9
Undefined Instruction9

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