9.2.4. Eviction buffer

As soon as a linefill is requested, the selected evicted cache line is loaded into the EViction Buffer (EVB). The EVB forwards this information to the AXI bus when possible.

The EVB has a structure of 256 bits for data and 32 bits for the address. See Cache line write-back (eviction) for more information about the AXI transaction generated.

The EVB is removed if cache RAMs are not implemented for the processor.

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