A.5.11. AHB peripheral port

Table A.15 shows the AHB peripheral port signals.

Table A.15. AHB peripheral port signals

Address Phase  
 HCLKENPmInputSynchronous enable for AHB transfers.
 HADDRPm[31:0]OutputSystem address bus
 HBURSTPm[2:0]OutputBurst type
 HMASTLOCKPmOutputIndicates that the current transfer is part of a locked sequence
 HPROTPm[3:0]OutputProtection type
 HSIZEPm[2:0]OutputIndicates the size of the transfer.
 HTRANSPm[1:0]OutputTransfer type
 HWDATAPm[31:0]OutputWrite data
 HWRITEPmOutputIndicates the direction of the transfer
Data phase  
 HRDATAPm[31:0]InputRead data
 HREADYPmInputIndicates that the previous transfer is finished
 HRESPPmInputTransfer response

Copyright © 2010-2011 ARM. All rights reserved.ARM DDI 0460C