8.2.5. Error correction

When a correctable error is detected in data that has been read from a RAM, the processor has various ways of generating the correct data, that follow two schemes:

Correct inline

The error code bits are used to correct the data read from the RAM, and this data is used. This is the simplest way of correcting the data.

Correct-and-retry

The error code bits are used to correct the data, and this data is then written back to the RAM. The processor then repeats the read access by re-executing the instruction that caused the read, and reads the corrected data from the RAM if no more errors have occurred. This takes more clock cycles, at least nine, in the event of an error, but has the side-effect of correcting the data in the RAM so that the errors in the data cannot become worse.

Note

Because RAM errors generally occur infrequently, the extra cycles required to perform correct-and-retry do not have a significant impact on average performance.

The correction method that the processor uses depends on the individual error. The processor uses correct inline error correction when it detects a correctable error on a TCM read made by the AXI-slave interface. The processor uses correct-and-retry correction when it detects a correctable ECC error on a TCM read made by the instruction-side or data-side.

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